How to Solve Analog High Voltage Delivery Challenges with a Bootstrap Approach
Original Title：How to Solve Analog High Voltage Delivery Challenges with a Bootstrap Approach
It’s a unique challenge to deliver the hundreds of analog volts that automated test equipment or precision control systems frequently require. Conventional operational amplifiers (op amps) cannot service the high output voltage swings, while discrete amplifier alternatives require a high degree of tweaking and consume more pc board real estate.
However, there is another option: bootstrap the combination of a high voltage rail-to-rail output op amp and a pair of FETs that are able to withstand high breakdown voltages.
This article will describe the problems high analog voltages present and common ways to solve them. It will then show how to use a bootstrap approach using a high voltage precision amplifier from Analog Devices, along with high voltage MOSFETs from Microchip Technology and Infineon Technologies.
These will be used to create a precision, high performance solution that provides twice the amplifier’s nominal signal range while continuing to provide higher performance with minimal board real estate.
Design options for high analog voltages
Some applications require output voltage swings higher than typical high voltage monolithic op amps can generate. An amplifier design using discrete transistors is one way to achieve wide voltage swings. This design approach has the flexibility of being able to customize the amplifier for the specific application. However, discrete transistor designs use more parts and increase the designer’s time and effort. It’s also hard to attain precision in discrete designs because of device matching and temperature gradients.
An alternative to the discrete high voltage amplifier is the high voltage op amp module. These modules noticeably ease the designer’s tasks. A high voltage module is often a hybrid module that allows both high voltage and high power operation. The advantage of these modules versus discrete designs is that modules have factory specified performance. While these specifications reduce the designer’s characterization activities, hybrid modules are costly. For the most part, high voltage monolithic op amps can meet most of the performance demands of a design.
However, in instances where they can’t, bootstrapping the monolithic op amp’s power supply opens up a list of available op amp options from a few solutions to hundreds by stretching the monolithic amplifier’s power supply beyond its specification. While bootstrapping strategies require more effort, the solution is significantly lower cost as compared to the high voltage modules. This is largely due to there being a variety of monolithic op amps that have sufficient factory specified performance. Note that bootstrapping doesn’t affect the amplifier’s DC specifications, such as voltage offset, input voltage swing, and output voltage swing.
Power supply bootstrapping techniques
The bootstrapping configuration controls a device’s supply voltages in relation to its output voltage. The bootstrap circuit has a pair of discrete transistors and a resistive bias network (Figure 1).
Figure 1: A simplified high voltage follower bootstrapping schematic with fixed +VS and -VS system supply voltages. The VCC and VEE device supply voltages change as a function of the output voltage, VOUT. (Image source: Bonnie Baker, from material courtesy of Analog Devices)
Many high voltage amplifiers eliminate the need for a bootstrap power supply. For example, the Analog Devices 10 megahertz (MHz) ADHV4702-1BCPZ shown in the Figure is a ±110 volt power supply that suffices for most high voltage applications. However, if the system requires yet higher voltages, the bootstrap approach easily doubles this circuit’s operating range.
To execute the boostrap, Infineon Technologies’ IRFP4868PBF N-channel MOSFET is used as Q1. This device has a breakdown voltage of 300 volts and ID max of 70 A. Q2 is the TP2435N8-G P-channel MOSFET from Microchip Technology. This has a breakdown voltage of 350 volts.
In Figure 1, the ADHV4702-1 precision amplifier has an operating supply voltage range of ±12 volts to ±110 volts. With a ±110 volt supply voltage, the typical output voltage range is ±108.5 volts. With ±VS equaling ±300 volts, this bootstrap circuit is a foundation for an amplifier that can attain an output swing of ±120 volts or more.
This bootstrap concept, also known as flying rails, continuously adjusts the amplifier’s supply voltages so that they are symmetric around the amplifier’s output voltage, VOUT. Accordingly, the output remains within the supply range. In the follower bootstrapped circuit, the resistor voltage dividers (RBOT and RTOP) keep the difference between VCC and VEE constant at ±90 volts while the amplifier output range is ±200 volts. A Spice simulation illustrates this floating supply phenomenon (Figure 2).
Figure 2: A Spice simulation shows the floating supply phenomenon where the amplifier delta power supplies (difference between VCC and VEE) remains at approximately ±90 volts, while the amplifier output range is ±200 volts. (Image source: Bonnie Baker)
In Figure 2, VOUT equals VIN, RTOP equals 45 kiloohms (kΩ), and RBOT equals 20 kΩ. RTOP is the resistor closest to the external supplies (+VS and -VS) and RBOT is the resistor closest to the op amp’s output (VOUT). Note that in Figure 2, the VCC and VEE voltages approach +VS (300 volts) and -VS (-300 volts). Circuit distortion occurs when the output signal (VOUT) forces either VCC and VEE to equal or beyond +VS or -VS.
Bootstrapping provides a high signal capability for any op amp. However, the amplifier’s slew rate impacts this high voltage configuration’s dynamic performance. In Figure 1, the op amp’s slew rate limits the ability of VCC and VEE response to a dynamic signal. Bootstrapping amplifiers is best applied for low frequency and DC applications where the supplies move slowly.
Bootstrap design implementation
The op amp power supply bootstrap design follows a three-step process:
Assess the tradeoff between the amplifier and MOSFET power dissipation
Determine the maximum amplifier output swing and assign the amplifier supply voltage
Account for resistor power requirements
In Figure 1, the power dissipation divides between the op amp and the MOSFET drain-source. The amplifier and FET have a voltage supply within a specified range of operation. It is tempting to power the amplifier with lower voltages, but this may stress the MOSFET. The total power dissipation is allocated between the amplifier and MOSFETs.
The relationship between the maximum op amp output swing range (±VOUT-MAX) and the op amp supplies (VEE, VCC) determine the resistor voltage divider network, per Equation 1.
If the nominal op amp supply voltage equals ±100 volts and the maximum output swing range equals ±150 volts, the divider ratio is therefore equal to:
This calculation renders a convenient way to determine the value of the resistors in this application. When selecting the resistors, however, it’s important to be mindful that high voltages are involved, and the resistors may be required to dissipate considerable power. Choose the resistors’ values to limit heat dissipation within their respective ratings.
For example, RTOP reaches 150 volts, and RBOT reaches 100 volts. Using ½ watt rated resistors, power dissipation (V2/R) limit is calculated using Equation 2:
Using the 45 kΩ resistor as the power dissipation limiting factor, the RBOT value yields a 2.5:1 divider with quiescent power dissipation limit calculated as follows:
The primary driver for MOSFET choice is the breakdown voltage. This voltage must withstand worst case bias conditions. The breakdown voltage is seen when the output is saturated, which happens when one MOSFET is at the maximum VDS, and the other MOSFET is at the minimum VDS. For instance, the highest absolute VDS is ~300 volts, which is the VOUT-MAX (500 volts) minus the total supply voltage of the amplifier, (VCC – VEE = 200 volts). Therefore, the withstand voltage for the MOSFETs must be at least 300 volts. Additionally, the calculation of the power dissipation must be the worst case of both VDS and the operating current. Designers must ensure that the MOSFETs are specified to operate at this power level.
The gate capacitance of the MOSFET creates a low pass filter with the bias resistors, and higher breakdown MOSFETs tend to have higher gate capacitances. In this circuit, bias resistors tend to be in the tens of kΩ to hundreds of kΩ. With these high values, it does not take much gate capacitance to slow down the circuit.
The MOSFET gate capacitance value in the datasheet (CGATE) and the parallel combination RTOP and RBOT, determine the pole frequency for a low pass filter, per Equation 3:
The frequency response of the bias network must remain ten times faster than both the input and output signals. If the bias network slows down the circuit, the output of the amplifier can extend its supply. The input also risks damage from momentary excursions outside the supply rails of the amplifier, while the output risks distortion due to momentary saturation or slew limiting. These conditions may create a loss of negative feedback, unpredictable transient behavior, and possibly a latch up due to phase reversal.
The amplifier in the power supply bootstrap circuit can be configured for higher noninverting gain. This bootstrap op amp configuration works in the same way as that of any other op amp gain stage. A noninverting configuration must be used. With a DC linearity measurement, the characteristics of the amplifier dominate the results (Figure 3). The amplifier is configured with a gain of 20 with a power supply range of ±140 volts.
Figure 3: Shown is the gain error vs. input voltage with a gain of 20 and a supply voltage of ±140 volts. (Image source: Analog Devices)
The op amp’s output has a finite slew rate, where its supplies are a function of its output. At the op amp’s input, a step function can exceed the op amp’s supply range (Figure 4).
Figure 4: Slew rate with a gain of 20 and a power supply range of ±140 volts. At the op amp’s input, a step function can exceed the op amp’s supply range, causing a latched condition. This can be avoided by putting a low pass filter on the input node. (Image source: Analog Devices)
In Figure 4, the specified slew rate of the ADHV4702-1 is 74 volts per microsecond (volts/ms). To avoid the latched condition, designers need to use a low pass filter on the signal input node (VIN). This slew limit circuitry reduces transients to less than or equal to the op amp’s slew rate, calculated using Equation 4:
Where VSTEP is the signal sources maximum step size and SR is the op amp’s slew rate.
An excellent way to drive high analog voltages at low cost and minimal board real estate is to bootstrap the combination of a high voltage rail-to-rail out op amp and a pair of transistors that can withstand high breakdown voltages. The ADHV4702-1 high voltage precision amplifier from Analog Devices, plus high voltage MOSFETs from Infineon and Microchip can be used to create such a precision, high performance solution that provides twice the amplifier’s nominal signal range while continuing to provide higher performance.
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